This simple 8-bit ripple-cary adder is the last stage of OSU8's ALU. All ALU opertations pass through this adder. Operations which do not use addition force one of the inputs to zero.

This ripple cary adder, and the similar ripple carry adder in the 16 bit ALU are the slowest portion of OSU8's circuitry. For Xilinx, this should probably use the fast-carry logic within the Xilinx CLBs, or custom CMOS this should probably be a Manchester carry or carry-lookahead type adder.

Schematic Drawing

OSU8: Simple 8-Bit Microprocessor Design; Paul Stoffregen
http://www.pjrc.com/tech/osu8/sch/ripple8.html
Last updated: February 24, 2005
Status: These pages are a work-in-progress
Comments, Suggestions: <paul@pjrc.com>