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OSU8 Microprocessor
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B Zero AND Gates

This array of AND gates is used to force the B input to zero, when the BZERO signal is asserted.

Schematic Drawing


OSU8: Simple 8-Bit Microprocessor Design; Paul Stoffregen
http://www.pjrc.com/tech/osu8/sch/and2x8x1_b.html
Last updated: February 24, 2005
Status: These pages are a work-in-progress
Comments, Suggestions: <paul@pjrc.com>