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You are here: OSU8 Microprocessor Schematic OSU8 Core 8-Bit Data ALU 8-Bit 3:1 Mux

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8-bit 3-input MUX

This simple group of MUX's passes one of three 8-bit data signals, which come from the gates that compute A AND B, A OR B, and B optionally zeroed and/or inteverted. One of these three operations is always passed into the ALU's adder.

Schematic Drawing 3:1 Mux


OSU8: Simple 8-Bit Microprocessor Design; Paul Stoffregen
http://www.pjrc.com/tech/osu8/sch/mux3x8.html
Last updated: February 24, 2005
Status: These pages are a work-in-progress
Comments, Suggestions: <paul@pjrc.com>