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You are here: OSU8 Microprocessor Schematic OSU8 Core Control State Machine Large Copy Sheet 4 Search PJRC

OSU8 Microprocessor
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Control State Machine, Sheet #4

This one of several schematics that make up the control logic. This schematic was generated automatically by logic synthesis, driven by the logic spec generated from the microcode, by the microcode compiler. Together with the 6 bit state register this logic makes up control state machine that causes the OSU8 microprocessor to execture code.

(3) Previous Schematic Sheet Next Schematic Sheet (4)

Also, view a much smaller version, that will probably fit onto your screen, but it's not easy to read

Schematic Drawing


OSU8: Simple 8-Bit Microprocessor Design; Paul Stoffregen
http://www.pjrc.com/tech/osu8/sch/c3l_big.html
Last updated: February 24, 2005
Status: These pages are a work-in-progress
Comments, Suggestions: <paul@pjrc.com>