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OSU8 Microcode
Here's the actual microcode for OSU8. Someday some more text should
appear here to explain how this works. Of course, it'd be nice
if the microcode language page actually had
info about this microcode language.
input_section
carry;
din bits=8;
operand bits=4;
output_section
next_state default=0 bits=6;
alu8op default=x bits=4;
alu16neg default=x;
alu16inc default=x;
alu16jump default=x;
at_en default=0;
ab_en default=0;
bt_en default=0;
bb_en default=0;
ir_en default=0;
tmp_en default=0;
pch_en default=0;
pcl_en default=0;
pc_selb default=x;
sph_en default=0;
spl_en default=0;
sp_selb default=x;
p1ht_en default=0;
p1hb_en default=0;
p1lt_en default=0;
p1lb_en default=0;
p1_selb default=x;
p2h_en default=0;
p2l_en default=0;
p2_selb default=x;
alu8_tri default=1;
ir8_tri default=1;
din_tri default=1;
zero8_tri default=1;
tmph_tri default=1;
tmpl_tri default=1;
pc_16a_tri default=1;
pc_16c_tri default=1;
sp_16a_tri default=1;
sp_16c_tri default=1;
p1_16a_tri default=1;
p1_16c_tri default=1;
p2_16a_tri default=1;
p2_16c_tri default=1;
bus_8_to_16d_tri default=1;
bus_16c_to_16d_tri default=1;
bus_16b_to_16c_tri default=1;
wr_req default=0;
rd_req default=0;
c_en default=0;
z_en default=0;
v_en default=0;
p_en default=0;
m2c default=0;
mc2 default=0;
state_section
reset code=0; rst_fetch;
fetch;
alua1; alub1;
mov2c; movc2;
call1; call2; call3; call4;
ret1; ret2;
load1;
store1;
incdecp1; incdecp2;
movep1;
pushab1;
pushp1; pushp2; pushp3;
popab1;
popp1; popp2;
movp2ab1; movp2ab2_8; movp2ab2_9; movp2ab2_10; movp2ab2_11;
movab2p1_12; movab2p1_13; movab2p1_14; movab2p1_15;
movimm_ab; movimm_at; movimm_bb; movimm_bt;
movimm_p1lb; movimm_p1lt; movimm_p1hb; movimm_p1ht;
jumpp1;
jumpup; jumpdown;
action_section
read rd_req=1;
write wr_req=1;
pc->16a pc_16a_tri=0;
sp->16a sp_16a_tri=0;
p1->16a p1_16a_tri=0;
p2->16a p2_16a_tri=0;
pc->16c pc_16c_tri=0;
sp->16c sp_16c_tri=0;
p1->16c p1_16c_tri=0;
p2->16c p2_16c_tri=0;
_16b->pc pc_selb=1, pch_en=1, pcl_en=1;
_16b->sp sp_selb=1, sph_en=1, spl_en=1;
_16b->p1 p1_selb=1, p1ht_en=1, p1hb_en=1, p1lt_en=1, p1lb_en=1;
_16b->p2 p2_selb=1, p2h_en=1, p2l_en=1;
_16d->pc pc_selb=0, pch_en=1, pcl_en=1;
_16d->sp sp_selb=0, sph_en=1, spl_en=1;
_16d->p1 p1_selb=0, p1ht_en=1, p1hb_en=1, p1lt_en=1, p1lb_en=1;
_16d->p2 pc_selb=0, pch_en=1, pcl_en=1;
_16b->tmp tmp_en=1;
_16d->pcl sp_selb=0, pcl_en=1;
_16d->pch sp_selb=0, pch_en=1;
_16d->p1l sp_selb=0, p1lb_en=1, p1lt_en=1;
_16d->p1h sp_selb=0, p1hb_en=1, p1ht_en=1;
_16d->p2l sp_selb=0, p2l_en=1;
_16d->p2h sp_selb=0, p2h_en=1;
_16d->p1lb p1lb_en=1;
_16d->p1lt p1lt_en=1;
_16d->p1hb p1hb_en=1;
_16d->p1ht p1ht_en=1;
alu16op+0 alu16inc=0, alu16neg=0, alu16jump=0;
alu16op+1 alu16inc=1, alu16neg=0, alu16jump=0;
alu16op-1 alu16inc=1, alu16neg=1, alu16jump=0;
alu16op_ju alu16inc=0, alu16neg=1, alu16jump=1;
alu16op_jd alu16inc=0, alu16neg=0, alu16jump=1;
_8->16d bus_8_to_16d_tri=0;
_16b->16c bus_16b_to_16c_tri=0;
_16c->16d bus_16c_to_16d_tri=0;
tmph->8 tmph_tri=0;
tmpl->8 tmpl_tri=0;
alu8->8 alu8_tri=0;
ir->8 ir8_tri=0;
zero->8 zero8_tri=0;
din->8 din_tri=0;
_8->a at_en=1, ab_en=1;
_8->b bt_en=1, bb_en=1;
_8->ab ab_en=1;
_8->at at_en=1;
_8->bb bb_en=1;
_8->bt bt_en=1;
alu8op_a alu8op = 0;
alu8op_~a alu8op = 1;
alu8op_b alu8op = 2;
alu8op_~b alu8op = 3;
alu8op_add alu8op = 4;
alu8op_sub alu8op = 5;
alu8op_and alu8op = 6;
alu8op_or alu8op = 7;
alu8op_rr alu8op = 8;
alu8op_rl alu8op = 9;
alu8op_rrc alu8op = 10;
alu8op_rlc alu8op = 11;
alu8op_a+1 alu8op = 12;
alu8op_a-1 alu8op = 13;
alu8op_b+1 alu8op = 14;
alu8op_b-1 alu8op = 15;
definition_section
next_instruction begin_def
if din = 0x00 next_state=$alua1
if din = 0x01 next_state=$alua1
if din = 0x02 next_state=$alua1
if din = 0x03 next_state=$alua1
if din = 0x04 next_state=$alua1
if din = 0x05 next_state=$alua1
if din = 0x06 next_state=$alua1
if din = 0x07 next_state=$alua1
if din = 0x08 next_state=$alua1
if din = 0x09 next_state=$alua1
if din = 0x0A next_state=$alua1
if din = 0x0B next_state=$alua1
if din = 0x0C next_state=$alua1
if din = 0x0D next_state=$alua1
if din = 0x0E next_state=$alua1
if din = 0x0F next_state=$alua1
if din = 0x10 next_state=$alub1
if din = 0x11 next_state=$alub1
if din = 0x12 next_state=$alub1
if din = 0x13 next_state=$alub1
if din = 0x14 next_state=$alub1
if din = 0x15 next_state=$alub1
if din = 0x16 next_state=$alub1
if din = 0x17 next_state=$alub1
if din = 0x18 next_state=$alub1
if din = 0x19 next_state=$alub1
if din = 0x1A next_state=$alub1
if din = 0x1B next_state=$alub1
if din = 0x1C next_state=$alub1
if din = 0x1D next_state=$alub1
if din = 0x1E next_state=$alub1
if din = 0x1F next_state=$alub1
if din = 0x20 next_state=$jumpup
if din = 0x21 next_state=$jumpup
if din = 0x22 next_state=$jumpup
if din = 0x23 next_state=$jumpup
if din = 0x24 next_state=$jumpup
if din = 0x25 next_state=$jumpup
if din = 0x26 next_state=$jumpup
if din = 0x27 next_state=$jumpup
if din = 0x28 next_state=$jumpup
if din = 0x29 next_state=$jumpup
if din = 0x2A next_state=$jumpup
if din = 0x2B next_state=$jumpup
if din = 0x2C next_state=$jumpup
if din = 0x2D next_state=$jumpup
if din = 0x2E next_state=$jumpup
if din = 0x2F next_state=$jumpup
if din = 0x30 next_state=$jumpdown
if din = 0x31 next_state=$jumpdown
if din = 0x32 next_state=$jumpdown
if din = 0x33 next_state=$jumpdown
if din = 0x34 next_state=$jumpdown
if din = 0x35 next_state=$jumpdown
if din = 0x36 next_state=$jumpdown
if din = 0x37 next_state=$jumpdown
if din = 0x38 next_state=$jumpdown
if din = 0x39 next_state=$jumpdown
if din = 0x3A next_state=$jumpdown
if din = 0x3B next_state=$jumpdown
if din = 0x3C next_state=$jumpdown
if din = 0x3D next_state=$jumpdown
if din = 0x3E next_state=$jumpdown
if din = 0x3F next_state=$jumpdown
if din = 0x40 next_state=$pushab1
if din = 0x41 next_state=$popab1
if din = 0x42 next_state=$pushab1
if din = 0x43 next_state=$popab1
if din = 0x44 next_state=$pushp1
if din = 0x45 next_state=$popp1
if din = 0x46 next_state=$fetch
if din = 0x47 next_state=$fetch
if din = 0x48 next_state=$pushp1
if din = 0x49 next_state=$popp1
if din = 0x4A next_state=$fetch
if din = 0x4B next_state=$fetch
if din = 0x4C next_state=$call1
if din = 0x4D next_state=$jumpp1
if din = 0x4E next_state=$ret1
if din = 0x4F next_state=$fetch
if din = 0x50 next_state=$load1
if din = 0x51 next_state=$load1
if din = 0x52 next_state=$load1
if din = 0x53 next_state=$load1
if din = 0x54 next_state=$fetch
if din = 0x55 next_state=$fetch
if din = 0x56 next_state=$fetch
if din = 0x57 next_state=$fetch
if din = 0x58 next_state=$store1
if din = 0x59 next_state=$store1
if din = 0x5A next_state=$store1
if din = 0x5B next_state=$store1
if din = 0x5C next_state=$fetch
if din = 0x5D next_state=$fetch
if din = 0x5E next_state=$fetch
if din = 0x5F next_state=$fetch
if din = 0x60 next_state=$mov2c
if din = 0x61 next_state=$mov2c
if din = 0x62 next_state=$mov2c
if din = 0x63 next_state=$mov2c
if din = 0x64 next_state=$mov2c
if din = 0x65 next_state=$mov2c
if din = 0x66 next_state=$mov2c
if din = 0x67 next_state=$mov2c
if din = 0x68 next_state=$movc2
if din = 0x69 next_state=$movc2
if din = 0x6A next_state=$movc2
if din = 0x6B next_state=$movc2
if din = 0x6C next_state=$movc2
if din = 0x6D next_state=$movc2
if din = 0x6E next_state=$movc2
if din = 0x6F next_state=$movc2
if din = 0x70 next_state=$incdecp1
if din = 0x71 next_state=$incdecp1
if din = 0x72 next_state=$incdecp1
if din = 0x73 next_state=$incdecp1
if din = 0x74 next_state=$movep1
if din = 0x75 next_state=$movep1
if din = 0x76 next_state=$movep1
if din = 0x77 next_state=$movep1
if din = 0x78 next_state=$movp2ab1
if din = 0x79 next_state=$movp2ab1
if din = 0x7A next_state=$movp2ab1
if din = 0x7B next_state=$movp2ab1
if din = 0x7C next_state=$movab2p1_12
if din = 0x7D next_state=$movab2p1_13
if din = 0x7E next_state=$movab2p1_14
if din = 0x7F next_state=$movab2p1_15
if din = 0x80 next_state=$movimm_ab
if din = 0x81 next_state=$movimm_ab
if din = 0x82 next_state=$movimm_ab
if din = 0x83 next_state=$movimm_ab
if din = 0x84 next_state=$movimm_ab
if din = 0x85 next_state=$movimm_ab
if din = 0x86 next_state=$movimm_ab
if din = 0x87 next_state=$movimm_ab
if din = 0x88 next_state=$movimm_ab
if din = 0x89 next_state=$movimm_ab
if din = 0x8A next_state=$movimm_ab
if din = 0x8B next_state=$movimm_ab
if din = 0x8C next_state=$movimm_ab
if din = 0x8D next_state=$movimm_ab
if din = 0x8E next_state=$movimm_ab
if din = 0x8F next_state=$movimm_ab
if din = 0x90 next_state=$movimm_at
if din = 0x91 next_state=$movimm_at
if din = 0x92 next_state=$movimm_at
if din = 0x93 next_state=$movimm_at
if din = 0x94 next_state=$movimm_at
if din = 0x95 next_state=$movimm_at
if din = 0x96 next_state=$movimm_at
if din = 0x97 next_state=$movimm_at
if din = 0x98 next_state=$movimm_at
if din = 0x99 next_state=$movimm_at
if din = 0x9A next_state=$movimm_at
if din = 0x9B next_state=$movimm_at
if din = 0x9C next_state=$movimm_at
if din = 0x9D next_state=$movimm_at
if din = 0x9E next_state=$movimm_at
if din = 0x9F next_state=$movimm_at
if din = 0xA0 next_state=$movimm_bb
if din = 0xA1 next_state=$movimm_bb
if din = 0xA2 next_state=$movimm_bb
if din = 0xA3 next_state=$movimm_bb
if din = 0xA4 next_state=$movimm_bb
if din = 0xA5 next_state=$movimm_bb
if din = 0xA6 next_state=$movimm_bb
if din = 0xA7 next_state=$movimm_bb
if din = 0xA8 next_state=$movimm_bb
if din = 0xA9 next_state=$movimm_bb
if din = 0xAA next_state=$movimm_bb
if din = 0xAB next_state=$movimm_bb
if din = 0xAC next_state=$movimm_bb
if din = 0xAD next_state=$movimm_bb
if din = 0xAE next_state=$movimm_bb
if din = 0xAF next_state=$movimm_bb
if din = 0xB0 next_state=$movimm_bt
if din = 0xB1 next_state=$movimm_bt
if din = 0xB2 next_state=$movimm_bt
if din = 0xB3 next_state=$movimm_bt
if din = 0xB4 next_state=$movimm_bt
if din = 0xB5 next_state=$movimm_bt
if din = 0xB6 next_state=$movimm_bt
if din = 0xB7 next_state=$movimm_bt
if din = 0xB8 next_state=$movimm_bt
if din = 0xB9 next_state=$movimm_bt
if din = 0xBA next_state=$movimm_bt
if din = 0xBB next_state=$movimm_bt
if din = 0xBC next_state=$movimm_bt
if din = 0xBD next_state=$movimm_bt
if din = 0xBE next_state=$movimm_bt
if din = 0xBF next_state=$movimm_bt
if din = 0xC0 next_state=$movimm_p1lb
if din = 0xC1 next_state=$movimm_p1lb
if din = 0xC2 next_state=$movimm_p1lb
if din = 0xC3 next_state=$movimm_p1lb
if din = 0xC4 next_state=$movimm_p1lb
if din = 0xC5 next_state=$movimm_p1lb
if din = 0xC6 next_state=$movimm_p1lb
if din = 0xC7 next_state=$movimm_p1lb
if din = 0xC8 next_state=$movimm_p1lb
if din = 0xC9 next_state=$movimm_p1lb
if din = 0xCA next_state=$movimm_p1lb
if din = 0xCB next_state=$movimm_p1lb
if din = 0xCC next_state=$movimm_p1lb
if din = 0xCD next_state=$movimm_p1lb
if din = 0xCE next_state=$movimm_p1lb
if din = 0xCF next_state=$movimm_p1lb
if din = 0xD0 next_state=$movimm_p1lt
if din = 0xD1 next_state=$movimm_p1lt
if din = 0xD2 next_state=$movimm_p1lt
if din = 0xD3 next_state=$movimm_p1lt
if din = 0xD4 next_state=$movimm_p1lt
if din = 0xD5 next_state=$movimm_p1lt
if din = 0xD6 next_state=$movimm_p1lt
if din = 0xD7 next_state=$movimm_p1lt
if din = 0xD8 next_state=$movimm_p1lt
if din = 0xD9 next_state=$movimm_p1lt
if din = 0xDA next_state=$movimm_p1lt
if din = 0xDB next_state=$movimm_p1lt
if din = 0xDC next_state=$movimm_p1lt
if din = 0xDD next_state=$movimm_p1lt
if din = 0xDE next_state=$movimm_p1lt
if din = 0xDF next_state=$movimm_p1lt
if din = 0xE0 next_state=$movimm_p1hb
if din = 0xE1 next_state=$movimm_p1hb
if din = 0xE2 next_state=$movimm_p1hb
if din = 0xE3 next_state=$movimm_p1hb
if din = 0xE4 next_state=$movimm_p1hb
if din = 0xE5 next_state=$movimm_p1hb
if din = 0xE6 next_state=$movimm_p1hb
if din = 0xE7 next_state=$movimm_p1hb
if din = 0xE8 next_state=$movimm_p1hb
if din = 0xE9 next_state=$movimm_p1hb
if din = 0xEA next_state=$movimm_p1hb
if din = 0xEB next_state=$movimm_p1hb
if din = 0xEC next_state=$movimm_p1hb
if din = 0xED next_state=$movimm_p1hb
if din = 0xEE next_state=$movimm_p1hb
if din = 0xEF next_state=$movimm_p1hb
if din = 0xF0 next_state=$movimm_p1ht
if din = 0xF1 next_state=$movimm_p1ht
if din = 0xF2 next_state=$movimm_p1ht
if din = 0xF3 next_state=$movimm_p1ht
if din = 0xF4 next_state=$movimm_p1ht
if din = 0xF5 next_state=$movimm_p1ht
if din = 0xF6 next_state=$movimm_p1ht
if din = 0xF7 next_state=$movimm_p1ht
if din = 0xF8 next_state=$movimm_p1ht
if din = 0xF9 next_state=$movimm_p1ht
if din = 0xFA next_state=$movimm_p1ht
if din = 0xFB next_state=$movimm_p1ht
if din = 0xFC next_state=$movimm_p1ht
if din = 0xFD next_state=$movimm_p1ht
if din = 0xFE next_state=$movimm_p1ht
if din = 0xFF next_state=$movimm_p1ht
end_def
prog_fetch
begin_def
pc->16a
alu16op+1
_16b->pc
_16b->16c
read
ir_en = 1
end_def
ucode_section
reset:
zero->8
_8->a
_8->b
_8->16d
_16d->pc
_16d->p1
_16d->p2
_16d->sp
next_state = $rst_fetch;
rst_fetch:
pc->16a alu16op+0
_16b->16c
read
ir_en = 1
next_instruction;
fetch: prog_fetch
next_instruction;
alua1: alu8->8
if operand==0 alu8op_a
if operand==1 alu8op_~a
if operand==2 alu8op_b
if operand==3 alu8op_~b
if operand==4 alu8op_add
if operand==5 alu8op_sub
if operand==6 alu8op_and
if operand==7 alu8op_or
if operand==8 alu8op_rr
if operand==9 alu8op_rl
if operand==10 alu8op_rrc
if operand==11 alu8op_rlc
if operand==12 alu8op_a+1
if operand==13 alu8op_a-1
if operand==14 alu8op_b+1
if operand==15 alu8op_b-1
_8->a
c_en = 1
v_en = 1
z_en = 1
#if my microcode processor could do more than one conditional
#assignment in a state, I could do the fetch within this state
#and execute the very important alu instructions twice as fast!
next_state = $fetch;
alub1: alu8->8
if operand==0 alu8op_a
if operand==1 alu8op_~a
if operand==2 alu8op_b
if operand==3 alu8op_~b
if operand==4 alu8op_add
if operand==5 alu8op_sub
if operand==6 alu8op_and
if operand==7 alu8op_or
if operand==8 alu8op_rr
if operand==9 alu8op_rl
if operand==10 alu8op_rrc
if operand==11 alu8op_rlc
if operand==12 alu8op_a+1
if operand==13 alu8op_a-1
if operand==14 alu8op_b+1
if operand==15 alu8op_b-1
_8->b
c_en = 1
v_en = 1
z_en = 1
#really want more than one conditional assignment here!
next_state = $fetch;
call1: pc->16a alu16op+1
_16b->tmp
next_state = $call2;
call2: tmph->8
sp->16a alu16op+1
sp->16c write
_16b->sp
next_state = $call3;
call3: tmpl->8
sp->16a alu16op+1
sp->16c write
_16b->sp
next_state = $call4;
call4: p1->16a alu16op+0
_16b->pc
p1->16c read
ir_en = 1
next_instruction;
ret1: sp->16a alu16op-1
_16b->sp
_16b->16c read
din->8
_8->16d
_16d->pcl
next_state = $ret2;
ret2: sp->16a alu16op-1
_16b->sp
_16b->16c read
din->8
_8->16d
_16d->pch
next_state = rst_fetch;
load1: if operand==0 p1->16c
if operand==1 p2->16c
if operand==2 p1->16c
if operand==3 p2->16c
read
din->8
if operand==0 _8->a
if operand==1 _8->a
if operand==2 _8->b
if operand==3 _8->b
next_state = $fetch;
store1: if operand==8 alu8op_a
if operand==9 alu8op_a
if operand==10 alu8op_b
if operand==11 alu8op_b
alu8->8
if operand==8 p1->16c
if operand==9 p2->16c
if operand==10 p1->16c
if operand==11 p2->16c
write
next_state = $fetch;
incdecp1:
if operand==0 p1->16a
if operand==1 p2->16a
if operand==2 p1->16a
if operand==3 p2->16a
if operand==0 alu16op+1
if operand==1 alu16op+1
if operand==2 alu16op-1
if operand==3 alu16op-1
if operand==0 _16b->p1
if operand==1 _16b->p2
if operand==2 _16b->p1
if operand==3 _16b->p2
p_en = 1
next_state = $incdecp2;
incdecp2:
p_en = 1
prog_fetch
next_instruction;
movep1:
if operand==4 p2->16a
if operand==5 p1->16a
if operand==6 sp->16a
if operand==7 p1->16a
if operand==4 _16b->p1
if operand==5 _16b->p2
if operand==6 _16b->p1
if operand==7 _16b->sp
alu16op+0
next_state = $fetch;
pushab1:if operand==0 alu8op_a
if operand==2 alu8op_b
alu8->8
sp->16a alu16op+1
sp->16c write
_16b->sp
next_state = $fetch;
pushp1: if operand==4 p1->16a
if operand==8 p2->16a
alu16op+0
_16b->tmp
next_state = $pushp2;
pushp2: tmph->8
sp->16a alu16op+1
sp->16c write
_16b->sp
next_state = $pushp3;
pushp3: tmpl->8
sp->16a alu16op+1
sp->16c write
_16b->sp
next_state = $fetch;
popab1: sp->16a alu16op-1
_16b->sp
_16b->16c read
din->8
if operand==1 _8->a
if operand==3 _8->b
next_state = $fetch;
popp1: sp->16a alu16op-1
_16b->sp
_16b->16c read
din->8
_8->16d
if operand==5 _16d->p1l
if operand==9 _16d->p2l
next_state = $popp2;
popp2: sp->16a alu16op-1
_16b->sp
_16b->16c read
din->8
_8->16d
if operand==5 _16d->p1h
if operand==9 _16d->p2h
next_state = $fetch;
movp2ab1:
p1->16a alu16op+0
_16b->tmp
if operand==8 next_state = $movp2ab2_8
if operand==9 next_state = $movp2ab2_9
if operand==10 next_state = $movp2ab2_10
if operand==11 next_state = $movp2ab2_11;
movp2ab2_8:
tmpl->8
_8->a
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movp2ab2_9:
tmph->8
_8->a
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movp2ab2_10:
tmpl->8
_8->b
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movp2ab2_11:
tmph->8
_8->b
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movab2p1_12:
alu8op_a
alu8->8
_8->16d
_16d->p1l
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movab2p1_13:
alu8op_a
alu8->8
_8->16d
_16d->p1h
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movab2p1_14:
alu8op_b
alu8->8
_8->16d
_16d->p1l
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movab2p1_15:
alu8op_b
alu8->8
_8->16d
_16d->p1h
#waste one cycle here to get a shorter vhdl file for
#now... this state could end in prog_fetch, next_instruction
next_state=$fetch;
movimm_ab:
ir->8
_8->ab
prog_fetch
next_instruction;
movimm_at:
ir->8
_8->at
prog_fetch
next_instruction;
movimm_bb:
ir->8
_8->bb
prog_fetch
next_instruction;
movimm_bt:
ir->8
_8->bt
prog_fetch
next_instruction;
movimm_p1lb:
ir->8
_8->16d
_16d->p1lb
prog_fetch
next_instruction;
movimm_p1lt:
ir->8
_8->16d
_16d->p1lt
prog_fetch
next_instruction;
movimm_p1hb:
ir->8
_8->16d
_16d->p1hb
prog_fetch
next_instruction;
movimm_p1ht:
ir->8
_8->16d
_16d->p1ht
prog_fetch
next_instruction;
jumpp1:
p1->16a alu16op+0
_16b->pc
_16b->16c read
ir_en = 1
next_instruction;
jumpup:
pc->16a
if carry==0 alu16op+1
if carry==1 alu16op_ju
_16b->pc
#if my microcode converter could support multiple
#conditional in one state, I could add:
# _16b->16c, read, ir_en=1, next_instruction
#and this important instruction would be twice as fast
next_state = $rst_fetch;
jumpdown:
pc->16a
if carry==0 alu16op+1
if carry==1 alu16op_jd
_16b->pc
#if my microcode converter could support multiple
#conditional in one state, I could add:
# _16b->16c, read, ir_en=1, next_instruction
#and this important instruction would be twice as fast
next_state = $rst_fetch;
# for now, let's just take two cycles needlessly, so the vhdl
# file is shorter... running into some problems with viewsynthesis.
mov2c:
m2c = 1
c_en = 1
next_state = $fetch;
movc2:
mc2 = 1
next_state = $fetch;
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