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This design is a bit old. It has been used with about a dozen different 3000 and 4000 series xilinx chips. It has not been tried with any of the newer parts, such as the 5000 series, Spartan, Spartan 2, Virtex, 9500 series, or Coolrunner CPLD. It may work with some of these, perhaps the 5000 and Spartan, perhaps with some tweaks to the code, but then again it may not.
Xilinx provides a schematic for their parallel cable which only requires a couple ordinary logic chips. If you want to build a cable, that would probably be the best option. This old cable is probably not as useful anymore.
Here is a company selling low-cost USB xilinx download cables.
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This cable only provides the download funtion. Readback is not supported. It does not work with the Xilinx software... to download a file, you just send the raw .BIT file directly to the COM port where the cable is connected. In Linux, I used "cat bitstream.bit > /dev/ttyS0". You can also use a terminal emulation program to send the file, as long is it will send it as raw binary data.
|C1, C2, C3, C4||2.2uF, 16V|
|C5, C6, C9||10uF, 6.3V|
|pin #||Name||3000 series||4000 series|
|pin 3||(removed)||No Connection||No Connection|
|pin 9||No Connection||No Connection||No Connection|
The assembly source is available, as well as a ZIP file with source, intel hex code and the pcb layout.