PAULMON2's Single-Step Run Feature

• uses int1
• can't do other interrupts
• needs 24 bytes of stack space
• uses 0x7C - 0x7D

During single step PAULMON2 enables INT1 as low level triggered, so that it causes interrupts endlessly. However, the 8051 hardware is designed so that it will always execute one instruction after returning from an interrupt before it services the next interrupt. In this manner, your program is run one step at a time. The single step run is not emulation... it is really being run by the hardware, and the single-step run feature is just an interrupt that shows you what instructions was executed.

>* the documentation is - as you state - not complete. On entering single step
>mode I found that my program got changed - documenting the interrupt rerouting in
>the single step section will help....

That's a feature, sort of...

The EPROM contains a LJMP to a location is RAM, where you would supposedly put for code for interrupt #1. Single-Step uses interrupt #1. To avoid putting any wierd code other than a single LJMP (as was done in version 1), PAULMON2 figures out where that LJMP will just to, and writes another LJMP into the RAM. If you have written code or stored data in those three locations, well, it will be wiped out.