;This code is in the public domain, and of course has no warranty ;of any kind. It worked for me; use it at your own risk. ; -- Paul Stoffregen, 1995, paul@ece.orst.edu ;there is another version of this code which is intended for the ;xilinx chip to be "properly" connected to the external bus... this ;version does all the work by manipulating port pins. ;This code programs a Xilinx 3000 series chip connected to the ;8051 using the Xilinx "Periphreal Mode". This code assumes you've ;connected D0 to D7 of the Xilinx chip to port 0 on the 8051, and ;that the 'BUSY' , 'CS0', and 'WS' pins of the Xilinx chip are ;connected to the pins of the 8051 as shown below. ;The other pins on the Xilinx part involved in the "Periphreal Mode" ;must be used, of course. Tie CS1 and M1 low, and tie CS2, M0, M2, and ;RESET low. The INIT and D/P lines were tied high with pull-up ;resistors on the test board, though you may wish to connect them ;differently if the chip is to be reprogrammed without shutting the ;power off and back on again. Refer to the Xilinx databook, of course. ;Program a xilinx 3030 chip using peripheral mode. The configuration ;data produced by the Xilinx CAE tools must be stored in the 8051's ;code memory, between the locations specified below. Use the Xilinx ;"MAKEPROM" utility to generate an Intel-HEX format (.mcs format) ;file that places the data at the "xc_begin" location in the upward ;direction. .equ xc_begin, 0x0500 ;first byte of Xilinx configuration .equ xc_end, 0x0FD9 ;last byte of Xilinx configuration .equ busy, 0x95 ;xilinx busy connected to p1.5 .equ cs0, 0x96 ;xilinx cs0 connected to p1.6 .equ ws, 0x97 ;xilinx ws connected to p1.7 pgm_xilinx: mov dptr, #xc_begin pgm_loop: clr a movc a, @a+dptr mov r2, dph mov r3, dpl pgm_wait: jnb busy, pgm_wait ;wait for it to be ready ;we write to it by forcing the data onto port0 and ;driving the control signals the hard way, since there ;is no address decoding logic built onto this board clr cs0 ;give it the chip select mov p0, a ;put the data out on port 0 clr ws ;assert the write signal setb ws ;it should grab the data now setb cs0 ;and unselect it mov p0, #255 ;make p0 all high now mov a, p0 ;read p0 so it'll be input again mov dptr, #xc_end mov a, r2 cjne a, dph, pgm_inc mov a, r3 cjne a, dpl, pgm_inc sjmp pgm_done pgm_inc:mov dph, r2 mov dpl, r3 inc dptr sjmp pgm_loop pgm_done: ;well, hopefully it programmed ok by this point ret